Hardware and Arithmetic for Hyperelliptic Curves Cryptography
October 2014 - December 2017
Consortium and Funding
- Lab-STICC laboratory (UMR 6285, MOCS team, since 01.01.2017) and IRISA laboratory (UMR 6074, CAIRN team, before 31.12.2016)
Institutions: CNRS, University Rennes 1 (UR1), University South Brittany (UBS)
Funding: Labex CominLabs and Brittany Région
- IRMAR laboratory (UMR 6625, GAR Team)
Institutions: CNRS, University Rennes 1
Funding: Labex Lebesgue
Efficient and robust public key cryptography, or asymmetric cryptography, is of major importance for security and privacy in many applications such as communications, e-commerce, control access, cloud computing, smart-phones, body area networks, TV boxes, Internet of Things, etc. In the past, RSA was the predominant solution for asymmetric cryptography. Since a few years, elliptic curves cryptography (ECC) is now the main standard with more efficient and less power consuming implementations than RSA for a similar theoretical security level. Very recent theoretical results show that hyperelliptic curve cryptography (HECC) is becoming a more efficient solution (on theoretical evaluations). Efficient arithmetic computations is a key element for hardware implementation of HECC systems. Arithmetic has an important role to play in providing algorithms robust against physical attacks (e.g. analysis of the power consumption, electromagnetic radiations or computation timings). Currently, there are only a very few hardware implementations of HECC (without any open source availability).
In this project, we study and prototype efficient arithmetic algorithms for hyperelliptic curve cryptography for hardware implementations (on FPGA circuits). We study new advanced arithmetic algorithms and representations of numbers for efficient and secure implementations of HECC in hardware. We develop a library of efficient and secure arithmetic units in hardware for HECC distributed as open source hardware code. We also design a fast and secure hardware implementation of HECC. To the best of our knowledge, there is neither similar library nor crypto-processor freely accessible for HECC implementation currently. We hope providing open source hardware code will help us to launch academic and industrial collaborations in the future. Another objective is the evaluation of trade-offs between performances (speed, internal code size, silicon cost and energy) and security (robustness against passive and active attacks). Those results may be used to guide designers during the specification of security applications (for future academic and industrial collaborations). Finally, we will perform an intensive security evaluation against physical attacks.
Public key cryptography, security, side channel attacks, arithmetic algorithms, representations of numbers, protections, countermeasures, hardware implementation, integrated circuits, FPGA